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authorRobel Kitaba <krobel@meta.com>2023-04-06 22:11:51 -0700
committerRobel Kitaba <krobel@meta.com>2023-04-06 22:19:14 -0700
commitef9cfd8045a5a9d121d2f348c149a89b8542c334 (patch)
tree7b8984d181b15757fe0f6661c49cba00af9db027 /dhcpv4
parent74ae03f2425e0d49fbf1206e9daf33bb1919201d (diff)
Adding arista port-channel support
Signed-off-by: Robel Kitaba <krobel@meta.com>
Diffstat (limited to 'dhcpv4')
-rw-r--r--dhcpv4/ztpv4/parse_circuitid.go2
-rw-r--r--dhcpv4/ztpv4/parse_circuitid_test.go3
2 files changed, 5 insertions, 0 deletions
diff --git a/dhcpv4/ztpv4/parse_circuitid.go b/dhcpv4/ztpv4/parse_circuitid.go
index 42f7647..63b34e3 100644
--- a/dhcpv4/ztpv4/parse_circuitid.go
+++ b/dhcpv4/ztpv4/parse_circuitid.go
@@ -37,6 +37,8 @@ var circuitRegexs = []*regexp.Regexp{
regexp.MustCompile("^Ethernet(?P<slot>[0-9]+)/(?P<port>[0-9]+)$"),
// Juniper bundle interface ae52.0
regexp.MustCompile("^ae(?P<port>[0-9]+).(?P<subport>[0-9])$"),
+ // Arista bundle interface Port-Channel1
+ regexp.MustCompile("^Port-Channel(?P<port>[0-9]+)$"),
// Ciena interface format
regexp.MustCompile(`\.OSC(-[0-9]+)?-(?P<slot>[0-9]+)-(?P<port>[0-9]+)$`),
}
diff --git a/dhcpv4/ztpv4/parse_circuitid_test.go b/dhcpv4/ztpv4/parse_circuitid_test.go
index 695d331..b2f6412 100644
--- a/dhcpv4/ztpv4/parse_circuitid_test.go
+++ b/dhcpv4/ztpv4/parse_circuitid_test.go
@@ -24,6 +24,7 @@ func TestMatchCircuitID(t *testing.T) {
{name: "Arista Vlan pattern 2", circuit: "Ethernet10:2020", want: &CircuitID{Port: "10", Vlan: "2020"}},
{name: "Cisco pattern", circuit: "Gi1/10:2020", want: &CircuitID{Slot: "1", Port: "10", Vlan: "2020"}},
{name: "Cisco Nexus pattern", circuit: "Ethernet1/3", want: &CircuitID{Slot: "1", Port: "3"}},
+ {name: "Arista Portchannel Pattern", circuit: "Port-Channel10", want: &CircuitID{Port: "10"}},
{name: "Juniper Bundle Pattern", circuit: "ae52.0", want: &CircuitID{Port: "52", SubPort: "0"}},
{name: "Juniper EX device pattern", circuit: "ge-0/0/0.0:RANDOMCHAR", want: &CircuitID{Slot: "0", Module: "0", Port: "0", SubPort: "0"}},
}
@@ -58,6 +59,7 @@ func TestFormatCircuitID(t *testing.T) {
{name: "Arista Vlan pattern 2", circuit: &CircuitID{Port: "10", Vlan: "2020"}, want: ",,10,,2020"},
{name: "Cisco Nexus pattern", circuit: &CircuitID{Slot: "1", Port: "3"}, want: "1,,3,,"},
{name: "Juniper Bundle Pattern", circuit: &CircuitID{Port: "52", SubPort: "0"}, want: ",,52,0,"},
+ {name: "Arista Portchannel Pattern", circuit: &CircuitID{Port: "10"}, want: ",,10,,"},
}
for _, tc := range tt {
@@ -87,6 +89,7 @@ func TestParseCircuitID(t *testing.T) {
{name: "Cisco pattern", circuit: []byte("Gi1/10:2020"), want: &CircuitID{Slot: "1", Port: "10", Vlan: "2020"}},
{name: "Cisco Nexus pattern", circuit: []byte("Ethernet1/3"), want: &CircuitID{Slot: "1", Port: "3"}},
{name: "Juniper Bundle Pattern", circuit: []byte("ae52.0"), want: &CircuitID{Port: "52", SubPort: "0"}},
+ {name: "Arista Portchannel Pattern", circuit: []byte("Port-Channel10"), want: &CircuitID{Port: "10"}},
{name: "Arista Vlan pattern 1 with circuitid type and length", circuit: []byte("\x00\x0fEthernet14:2001"), want: &CircuitID{Port: "14", Vlan: "2001"}},
{name: "juniperEX pattern", circuit: []byte("ge-0/0/0.0:RANDOMCHAR"), want: &CircuitID{Slot: "0", Module: "0", Port: "0", SubPort: "0"}},
{name: "Ciena pattern 1", circuit: []byte("tt-tt-tttt-6-7.OSC-1-2"), want: &CircuitID{Slot: "1", Port: "2"}},