From af7b41d800418528fda52a4112d180396e6099ee Mon Sep 17 00:00:00 2001 From: René van Dorst Date: Tue, 13 Feb 2018 12:10:51 +0100 Subject: chacha20poly1305: add mips32 implementation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: René van Dorst Signed-off-by: Jason A. Donenfeld --- src/crypto/chacha20poly1305.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) (limited to 'src/crypto/chacha20poly1305.c') diff --git a/src/crypto/chacha20poly1305.c b/src/crypto/chacha20poly1305.c index c066d93..13b5ec6 100644 --- a/src/crypto/chacha20poly1305.c +++ b/src/crypto/chacha20poly1305.c @@ -83,10 +83,13 @@ void __init chacha20poly1305_fpu_init(void) chacha20poly1305_use_neon = elf_hwcap & HWCAP_NEON; #endif } -#elif defined(CONFIG_MIPS) && defined(CONFIG_64BIT) +#elif defined(CONFIG_MIPS) && (defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)) asmlinkage void poly1305_init_mips(void *ctx, const u8 key[16]); asmlinkage void poly1305_blocks_mips(void *ctx, const u8 *inp, size_t len, u32 padbit); asmlinkage void poly1305_emit_mips(void *ctx, u8 mac[16], const u32 nonce[4]); +#if defined(CONFIG_CPU_MIPS32_R2) +asmlinkage void chacha20_mips(u8 *out, const u8 *in, size_t len, const u32 key[8], const u32 counter[4]); +#endif void __init chacha20poly1305_fpu_init(void) { } #else void __init chacha20poly1305_fpu_init(void) { } @@ -263,6 +266,10 @@ no_simd: chacha20_arm(dst, src, bytes, &ctx->state[4], &ctx->state[12]); ctx->state[12] += (bytes + 63) / 64; return; +#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_MIPS32_R2) + chacha20_mips(dst, src, bytes, &ctx->state[4], &ctx->state[12]); + ctx->state[12] += (bytes + 63) / 64; + return; #endif if (dst != src) @@ -287,7 +294,7 @@ struct poly1305_ctx { size_t num; } __aligned(8); -#if !(defined(CONFIG_X86_64) || defined(CONFIG_ARM) || defined(CONFIG_ARM64) || (defined(CONFIG_MIPS) && defined(CONFIG_64BIT))) +#if !(defined(CONFIG_X86_64) || defined(CONFIG_ARM) || defined(CONFIG_ARM64) || (defined(CONFIG_MIPS) && (defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)))) struct poly1305_internal { u32 h[5]; u32 r[4]; @@ -460,7 +467,7 @@ static void poly1305_init(struct poly1305_ctx *ctx, const u8 key[POLY1305_KEY_SI poly1305_init_x86_64(ctx->opaque, key); #elif defined(CONFIG_ARM) || defined(CONFIG_ARM64) poly1305_init_arm(ctx->opaque, key); -#elif defined(CONFIG_MIPS) && defined(CONFIG_64BIT) +#elif defined(CONFIG_MIPS) && (defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)) poly1305_init_mips(ctx->opaque, key); #else poly1305_init_generic(ctx->opaque, key); @@ -494,7 +501,7 @@ static inline void poly1305_blocks(void *ctx, const u8 *inp, size_t len, u32 pad else #endif poly1305_blocks_arm(ctx, inp, len, padbit); -#elif defined(CONFIG_MIPS) && defined(CONFIG_64BIT) +#elif defined(CONFIG_MIPS) && (defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)) poly1305_blocks_mips(ctx, inp, len, padbit); #else poly1305_blocks_generic(ctx, inp, len, padbit); @@ -527,7 +534,7 @@ static inline void poly1305_emit(void *ctx, u8 mac[16], const u32 nonce[4], bool else #endif poly1305_emit_arm(ctx, mac, nonce); -#elif defined(CONFIG_MIPS) && defined(CONFIG_64BIT) +#elif defined(CONFIG_MIPS) && (defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)) poly1305_emit_mips(ctx, mac, nonce); #else poly1305_emit_generic(ctx, mac, nonce); -- cgit v1.2.3