From d00ef10456cd0fcf142864d6bfc5d8f8bc88e684 Mon Sep 17 00:00:00 2001 From: Koichi Shiraishi Date: Mon, 14 Jun 2021 11:09:14 +0900 Subject: Fix frame pointer is clobbered before saving vet issue on BP register BP should be callee-save. It will be saved automatically if there is nonzero frame size. $ go vet -framepointer ./pkg/atomicbitops pkg/atomicbitops/atomicbitops_amd64.s:27:1: frame pointer is clobbered before saving pkg/atomicbitops/atomicbitops_amd64.s:34:1: frame pointer is clobbered before saving pkg/atomicbitops/atomicbitops_amd64.s:50:1: frame pointer is clobbered before saving pkg/atomicbitops/atomicbitops_amd64.s:57:1: frame pointer is clobbered before saving pkg/atomicbitops/atomicbitops_amd64.s:64:1: frame pointer is clobbered before saving Signed-off-by: Koichi Shiraishi --- pkg/atomicbitops/atomicbitops_amd64.s | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/pkg/atomicbitops/atomicbitops_amd64.s b/pkg/atomicbitops/atomicbitops_amd64.s index 54c887ee5..4d9358a3b 100644 --- a/pkg/atomicbitops/atomicbitops_amd64.s +++ b/pkg/atomicbitops/atomicbitops_amd64.s @@ -16,21 +16,21 @@ #include "textflag.h" -TEXT ·AndUint32(SB),$0-12 +TEXT ·AndUint32(SB),$8-12 MOVQ addr+0(FP), BP MOVL val+8(FP), AX LOCK ANDL AX, 0(BP) RET -TEXT ·OrUint32(SB),$0-12 +TEXT ·OrUint32(SB),$8-12 MOVQ addr+0(FP), BP MOVL val+8(FP), AX LOCK ORL AX, 0(BP) RET -TEXT ·XorUint32(SB),$0-12 +TEXT ·XorUint32(SB),$8-12 MOVQ addr+0(FP), BP MOVL val+8(FP), AX LOCK @@ -46,21 +46,21 @@ TEXT ·CompareAndSwapUint32(SB),$0-20 MOVL AX, ret+16(FP) RET -TEXT ·AndUint64(SB),$0-16 +TEXT ·AndUint64(SB),$8-16 MOVQ addr+0(FP), BP MOVQ val+8(FP), AX LOCK ANDQ AX, 0(BP) RET -TEXT ·OrUint64(SB),$0-16 +TEXT ·OrUint64(SB),$8-16 MOVQ addr+0(FP), BP MOVQ val+8(FP), AX LOCK ORQ AX, 0(BP) RET -TEXT ·XorUint64(SB),$0-16 +TEXT ·XorUint64(SB),$8-16 MOVQ addr+0(FP), BP MOVQ val+8(FP), AX LOCK -- cgit v1.2.3 From f13a9e2c13c2680fc53c08d49b659a874e9cc9b1 Mon Sep 17 00:00:00 2001 From: Koichi Shiraishi Date: Thu, 12 Aug 2021 06:18:36 +0900 Subject: Use BX insted of BP Signed-off-by: Koichi Shiraishi --- pkg/atomicbitops/atomicbitops_amd64.s | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/pkg/atomicbitops/atomicbitops_amd64.s b/pkg/atomicbitops/atomicbitops_amd64.s index 4d9358a3b..b6c2eb693 100644 --- a/pkg/atomicbitops/atomicbitops_amd64.s +++ b/pkg/atomicbitops/atomicbitops_amd64.s @@ -16,22 +16,22 @@ #include "textflag.h" -TEXT ·AndUint32(SB),$8-12 - MOVQ addr+0(FP), BP +TEXT ·AndUint32(SB),$0-12 + MOVQ addr+0(FP), BX MOVL val+8(FP), AX LOCK ANDL AX, 0(BP) RET -TEXT ·OrUint32(SB),$8-12 - MOVQ addr+0(FP), BP +TEXT ·OrUint32(SB),$0-12 + MOVQ addr+0(FP), BX MOVL val+8(FP), AX LOCK ORL AX, 0(BP) RET -TEXT ·XorUint32(SB),$8-12 - MOVQ addr+0(FP), BP +TEXT ·XorUint32(SB),$0-12 + MOVQ addr+0(FP), BX MOVL val+8(FP), AX LOCK XORL AX, 0(BP) @@ -46,22 +46,22 @@ TEXT ·CompareAndSwapUint32(SB),$0-20 MOVL AX, ret+16(FP) RET -TEXT ·AndUint64(SB),$8-16 - MOVQ addr+0(FP), BP +TEXT ·AndUint64(SB),$0-16 + MOVQ addr+0(FP), BX MOVQ val+8(FP), AX LOCK ANDQ AX, 0(BP) RET -TEXT ·OrUint64(SB),$8-16 - MOVQ addr+0(FP), BP +TEXT ·OrUint64(SB),$0-16 + MOVQ addr+0(FP), BX MOVQ val+8(FP), AX LOCK ORQ AX, 0(BP) RET -TEXT ·XorUint64(SB),$8-16 - MOVQ addr+0(FP), BP +TEXT ·XorUint64(SB),$0-16 + MOVQ addr+0(FP), BX MOVQ val+8(FP), AX LOCK XORQ AX, 0(BP) -- cgit v1.2.3 From ec8bdfae7f2159758fe8ec0cb9dbe6ea7c14b961 Mon Sep 17 00:00:00 2001 From: Koichi Shiraishi Date: Thu, 12 Aug 2021 06:25:19 +0900 Subject: Use BX instead of BP at AX second op Signed-off-by: Koichi Shiraishi --- pkg/atomicbitops/atomicbitops_amd64.s | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/pkg/atomicbitops/atomicbitops_amd64.s b/pkg/atomicbitops/atomicbitops_amd64.s index b6c2eb693..cbaf716bb 100644 --- a/pkg/atomicbitops/atomicbitops_amd64.s +++ b/pkg/atomicbitops/atomicbitops_amd64.s @@ -20,21 +20,21 @@ TEXT ·AndUint32(SB),$0-12 MOVQ addr+0(FP), BX MOVL val+8(FP), AX LOCK - ANDL AX, 0(BP) + ANDL AX, 0(BX) RET TEXT ·OrUint32(SB),$0-12 MOVQ addr+0(FP), BX MOVL val+8(FP), AX LOCK - ORL AX, 0(BP) + ORL AX, 0(BX) RET TEXT ·XorUint32(SB),$0-12 MOVQ addr+0(FP), BX MOVL val+8(FP), AX LOCK - XORL AX, 0(BP) + XORL AX, 0(BX) RET TEXT ·CompareAndSwapUint32(SB),$0-20 @@ -50,21 +50,21 @@ TEXT ·AndUint64(SB),$0-16 MOVQ addr+0(FP), BX MOVQ val+8(FP), AX LOCK - ANDQ AX, 0(BP) + ANDQ AX, 0(BX) RET TEXT ·OrUint64(SB),$0-16 MOVQ addr+0(FP), BX MOVQ val+8(FP), AX LOCK - ORQ AX, 0(BP) + ORQ AX, 0(BX) RET TEXT ·XorUint64(SB),$0-16 MOVQ addr+0(FP), BX MOVQ val+8(FP), AX LOCK - XORQ AX, 0(BP) + XORQ AX, 0(BX) RET TEXT ·CompareAndSwapUint64(SB),$0-32 -- cgit v1.2.3