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PiperOrigin-RevId: 347890782
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PiperOrigin-RevId: 347660920
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PiperOrigin-RevId: 347047550
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PiperOrigin-RevId: 346496532
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PiperOrigin-RevId: 346143528
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PiperOrigin-RevId: 346134026
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PiperOrigin-RevId: 344958513
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If no vild syndrome(data abort outside memslots) was reported by kvm, let userspace to do the
ext_dabt injection to bail out this issue.
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
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This patch adds support for tlbi-vale1ls/tlbi-aside1ls.
And make the code consistent with the flush strategy of the x86 platform.
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
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As PCALIGN is available on golang asm for arm64.
https://golang.org/pkg/cmd/internal/obj/arm64/
No need to use rewriteVectors() to ensure
alignment of exception vector.
Signed-off-by: Howard Zhang <howard.zhang@arm.com>
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PiperOrigin-RevId: 343130667
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PiperOrigin-RevId: 343000335
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Optimize and bug fix all fpsimd related code.
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
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I added 2 unified processing functions for all exceptions of el/el0
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
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feature
Signed-off-by: Robin Luk <lubin.lu@alibaba-inc.com>
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PiperOrigin-RevId: 341445910
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PiperOrigin-RevId: 340484823
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Use an sErr injection to trigger sigbus when we receive EFAULT from the
run ioctl.
After applying this patch, mmap_test_runsc_kvm will be passed on
Arm64.
Signed-off-by: Bin Lu <bin.lu@arm.com>
COPYBARA_INTEGRATE_REVIEW=https://github.com/google/gvisor/pull/4542 from lubinszARM:pr_kvm_mmap_1 f81bd42466d1d60a581e5fb34de18b78878c68c1
PiperOrigin-RevId: 340461239
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Signed-off-by: Howard Zhang <howard.zhang@arm.com>
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Fixes: #509
Signed-off-by: Lai Jiangshan <jiangshan.ljs@antfin.com>
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
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PiperOrigin-RevId: 339921446
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current when save fpsmid register is using following
instruction:
# FMOVD Fx, 16*1(R0)
this instruction will compiled to:
# str Dx, [x0, #16]
Dx is 64bit fp register not 128bit, then upper 64bit data
will be lossed, this will cause application meet many random
crash issue. need use 128bit register Vx or Q0 to save and
restore the fpsmid context.
Signed-off-by: Min Le <lemin.lm@antgroup.com>
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PiperOrigin-RevId: 339540747
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Signed-off-by: Min Le <lemin.lm@antgroup.com>
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I have added support for setSystemTimeLegacy() by setting cntvoff.
With this pr, TestRdtsc and other kvm syscall test cases(nanosleep,
wait...) can be passed on Arm64.
TO-DO: Add precise synchronization to KVM for Arm64.
Reference PR: https://github.com/google/gvisor/pull/4397
Signed-off-by: Bin Lu <bin.lu@arm.com>
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PiperOrigin-RevId: 338321125
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PiperOrigin-RevId: 338126491
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Consistent with the linux kernel, bad regs.Sp
return SIGSEGV
Signed-off-by: Howard Zhang <howard.zhang@arm.com>
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Consistent with the linux approach, we will produce a sigill to handle
el0_undef.
After applying this patch, exec_binary_test_runsc_kvm will be passed on
Arm64.
Signed-off-by: Bin Lu <bin.lu@arm.com>
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PiperOrigin-RevId: 337544656
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Signed-off-by: Min Le <lemin.lm@antgroup.com>
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PiperOrigin-RevId: 336976081
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PiperOrigin-RevId: 336970511
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PiperOrigin-RevId: 336962937
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The required states may simply not be observed by the thread running bounce, so
track guest and user generations to ensure that at least one of the desired
state transitions happens.
Fixes #3532
PiperOrigin-RevId: 336908216
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PiperOrigin-RevId: 336719900
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The tls of guest-el1-sentry and host-el0-sentry may be different on Arm64.
I added a solution for it.
Signed-off-by: Bin Lu <bin.lu@arm.com>
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Signed-off-by: Min Le <lemin.lm@antgroup.com>
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PiperOrigin-RevId: 336366624
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PiperOrigin-RevId: 336362818
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the correct value needed is 0xbbff440c0400 but the const
defined is 0x000000000000ffc0 due to the operator error
in _MT_EL1_INIT, both kernel and user space memory
attribute should be Normal memory not DEVICE_nGnRE
Signed-off-by: Min Le <lemin.lm@antgroup.com>
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PiperOrigin-RevId: 335930035
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By using TSC scaling as a hack, we can trick the kernel into setting an offset
of exactly zero. Huzzah!
PiperOrigin-RevId: 335922019
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Updates #267
PiperOrigin-RevId: 335713923
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PiperOrigin-RevId: 335532690
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Before we thought that interrupts are always disabled in the kernel
space, but here is a case when goruntime switches on a goroutine which
has been saved in the host mode. On restore, the popf instruction is
used to restore flags and this means that all flags what the goroutine
has in the host mode will be restored in the kernel mode. And in the
host mode, interrupts are always enabled.
The long story short, we can't use the IF flag for determine whether a
tasks is running in user or kernel mode.
This patch reworks the code so that in userspace, the first bit of the
IOPL flag will be always set. This doesn't give any new privilidges for
a task because CPL in userspace is always 3. But then we can use this
flag to distinguish user and kernel modes. The IOPL flag is never set in
the kernel and host modes.
Reported-by: syzbot+5036b325a8eb15c030cf@syzkaller.appspotmail.com
Reported-by: syzbot+034d580e89ad67b8dc75@syzkaller.appspotmail.com
Signed-off-by: Andrei Vagin <avagin@gmail.com>
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Related with issue #3019, #4056.
When running hello-world with gvisor-kvm, there is panic when exits:
"
panic: runtime error: invalid memory address or nil pointer dereference
[signal SIGSEGV: segmentation violation code=0x1 addr=0x3c0 pc=0x7c3f18]
goroutine 284 [running]:
... ...
gvisor.dev/gvisor/pkg/sentry/platform/kvm.(*machine).dropPageTables(0x4000166840, 0x400032a040)
pkg/sentry/platform/kvm/machine_arm64.go:111 +0x88 fp=0x4000479e00 sp=0x4000479da0 pc=0x7c3f18
"
Also make dropPageTables() arch independent.
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PiperOrigin-RevId: 334674481
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Signed-off-by: Bin Lu <bin.lu@arm.com>
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Currently there is a problem with the preservation of usr-tls, which leads
to the contamination of sentry tls.
Signed-off-by: Bin Lu <bin.lu@arm.com>
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