Age | Commit message (Collapse) | Author |
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The root table physical page has to be mapped to not fault in iret or sysret
after switching into a user address space. sysret and iret are in the upper
half that is global and so page tables of lower levels are already mapped.
Fixes #5742
PiperOrigin-RevId: 371458644
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PiperOrigin-RevId: 369686298
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PiperOrigin-RevId: 367730917
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PiperOrigin-RevId: 367523491
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Goruntime sets mxcsr once and never changes it.
Reported-by: syzbot+ec55cea6e57ec083b7a6@syzkaller.appspotmail.com
Fixes: #5754
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Signed-off-by: Howard Zhang <howard.zhang@arm.com>
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Split usermem package to help remove syserror dependency in go_marshal.
New hostarch package contains code not dependent on syserror.
PiperOrigin-RevId: 365651233
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It is enough to invalidate the tlb of local vcpu in switch().
TLBI with inner-sharable will invalidate the tlb in other vcpu.
Arm64 hardware supports at least 256 pcid, so I think it's ok
to set the length of pcid pool to 128.
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
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Signed-off-by: Howard Zhang <howard.zhang@arm.com>
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This change is inspired by Adin's cl/355256448.
PiperOrigin-RevId: 364695931
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Implement basic lazy save and restore for FPSIMD registers, which only
restore FPSIMD state on el0_fpsimd_acc and save FPSIMD state in switch().
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
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In order to improve the performance and stability, I reorg 2 modules slightly.
arch: no red zone on Arm64.
ring0: use stp instead of movd, and set RSV_REG_APP=R19.
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
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This allows the package to serve as a general purpose ring0 support package, as
opposed to being bound to specific sentry platforms.
Updates #5039
PiperOrigin-RevId: 355220044
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