diff options
Diffstat (limited to 'pkg/sentry')
-rw-r--r-- | pkg/sentry/arch/arch_arm64_abi_autogen_unsafe.go | 11 | ||||
-rw-r--r-- | pkg/sentry/arch/signal_arm64.go | 9 | ||||
-rw-r--r-- | pkg/sentry/platform/kvm/bluepill_arm64.go | 8 | ||||
-rw-r--r-- | pkg/sentry/platform/kvm/machine_arm64_unsafe.go | 8 |
4 files changed, 9 insertions, 27 deletions
diff --git a/pkg/sentry/arch/arch_arm64_abi_autogen_unsafe.go b/pkg/sentry/arch/arch_arm64_abi_autogen_unsafe.go index fd02c41c3..327a54a11 100644 --- a/pkg/sentry/arch/arch_arm64_abi_autogen_unsafe.go +++ b/pkg/sentry/arch/arch_arm64_abi_autogen_unsafe.go @@ -173,8 +173,7 @@ func (s *SignalContext64) SizeBytes() int { return 32 + 8*31 + 1*8 + - (*FpsimdContext)(nil).SizeBytes() + - 1*3568 + (*FpsimdContext)(nil).SizeBytes() } // MarshalBytes implements marshal.Marshallable.MarshalBytes. @@ -197,10 +196,6 @@ func (s *SignalContext64) MarshalBytes(dst []byte) { } s.Fpsimd64.MarshalBytes(dst[:s.Fpsimd64.SizeBytes()]) dst = dst[s.Fpsimd64.SizeBytes():] - for idx := 0; idx < 3568; idx++ { - dst[0] = byte(s.Reserved[idx]) - dst = dst[1:] - } } // UnmarshalBytes implements marshal.Marshallable.UnmarshalBytes. @@ -223,10 +218,6 @@ func (s *SignalContext64) UnmarshalBytes(src []byte) { } s.Fpsimd64.UnmarshalBytes(src[:s.Fpsimd64.SizeBytes()]) src = src[s.Fpsimd64.SizeBytes():] - for idx := 0; idx < 3568; idx++ { - s.Reserved[idx] = uint8(src[0]) - src = src[1:] - } } // Packed implements marshal.Marshallable.Packed. diff --git a/pkg/sentry/arch/signal_arm64.go b/pkg/sentry/arch/signal_arm64.go index 7fde5d34e..71596130d 100644 --- a/pkg/sentry/arch/signal_arm64.go +++ b/pkg/sentry/arch/signal_arm64.go @@ -36,7 +36,6 @@ type SignalContext64 struct { Pstate uint64 _pad [8]byte // __attribute__((__aligned__(16))) Fpsimd64 FpsimdContext // size = 528 - Reserved [3568]uint8 } // +marshal @@ -86,10 +85,6 @@ func (c *context64) NewSignalStack() NativeSignalStack { func (c *context64) SignalSetup(st *Stack, act *SignalAct, info *SignalInfo, alt *SignalStack, sigset linux.SignalSet) error { sp := st.Bottom - if !(alt.IsEnabled() && sp == alt.Top()) { - sp -= 128 - } - // Construct the UContext64 now since we need its size. uc := &UContext64{ Flags: 0, @@ -102,6 +97,10 @@ func (c *context64) SignalSetup(st *Stack, act *SignalAct, info *SignalInfo, alt }, Sigset: sigset, } + if linux.Signal(info.Signo) == linux.SIGSEGV || linux.Signal(info.Signo) == linux.SIGBUS { + uc.MContext.FaultAddr = info.Addr() + } + ucSize := uc.SizeBytes() // frameSize = ucSize + sizeof(siginfo). diff --git a/pkg/sentry/platform/kvm/bluepill_arm64.go b/pkg/sentry/platform/kvm/bluepill_arm64.go index 35298135a..6846abee9 100644 --- a/pkg/sentry/platform/kvm/bluepill_arm64.go +++ b/pkg/sentry/platform/kvm/bluepill_arm64.go @@ -111,8 +111,8 @@ func (c *vCPU) KernelSyscall() { regs.Pc -= 4 // Rewind. } - vfpEnable := ring0.CPACREL1() - if vfpEnable != 0 { + fpDisableTrap := ring0.CPACREL1() + if fpDisableTrap != 0 { fpsimd := fpsimdPtr((*byte)(c.floatingPointState)) fpcr := ring0.GetFPCR() fpsr := ring0.GetFPSR() @@ -135,8 +135,8 @@ func (c *vCPU) KernelException(vector ring0.Vector) { regs.Pc = 0 } - vfpEnable := ring0.CPACREL1() - if vfpEnable != 0 { + fpDisableTrap := ring0.CPACREL1() + if fpDisableTrap != 0 { fpsimd := fpsimdPtr((*byte)(c.floatingPointState)) fpcr := ring0.GetFPCR() fpsr := ring0.GetFPSR() diff --git a/pkg/sentry/platform/kvm/machine_arm64_unsafe.go b/pkg/sentry/platform/kvm/machine_arm64_unsafe.go index dca0cdb60..78cbd9701 100644 --- a/pkg/sentry/platform/kvm/machine_arm64_unsafe.go +++ b/pkg/sentry/platform/kvm/machine_arm64_unsafe.go @@ -70,14 +70,6 @@ func (c *vCPU) initArchState() error { panic(fmt.Sprintf("error setting KVM_ARM_VCPU_INIT failed: %v", errno)) } - // cpacr_el1 - reg.id = _KVM_ARM64_REGS_CPACR_EL1 - // It is off by default, and it is turned on only when in use. - data = 0 // Disable fpsimd. - if err := c.setOneRegister(®); err != nil { - return err - } - // tcr_el1 data = _TCR_TXSZ_VA48 | _TCR_CACHE_FLAGS | _TCR_SHARED | _TCR_TG_FLAGS | _TCR_ASID16 | _TCR_IPS_40BITS reg.id = _KVM_ARM64_REGS_TCR_EL1 |