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-rw-r--r--pkg/atomicbitops/BUILD22
-rw-r--r--pkg/atomicbitops/atomicbitops.go47
-rw-r--r--pkg/atomicbitops/atomicbitops_amd64.s77
-rw-r--r--pkg/atomicbitops/atomicbitops_arm64.s105
-rw-r--r--pkg/atomicbitops/atomicbitops_noasm.go105
-rw-r--r--pkg/atomicbitops/atomicbitops_test.go198
6 files changed, 554 insertions, 0 deletions
diff --git a/pkg/atomicbitops/BUILD b/pkg/atomicbitops/BUILD
new file mode 100644
index 000000000..1a30f6967
--- /dev/null
+++ b/pkg/atomicbitops/BUILD
@@ -0,0 +1,22 @@
+load("//tools:defs.bzl", "go_library", "go_test")
+
+package(licenses = ["notice"])
+
+go_library(
+ name = "atomicbitops",
+ srcs = [
+ "atomicbitops.go",
+ "atomicbitops_amd64.s",
+ "atomicbitops_arm64.s",
+ "atomicbitops_noasm.go",
+ ],
+ visibility = ["//:sandbox"],
+)
+
+go_test(
+ name = "atomicbitops_test",
+ size = "small",
+ srcs = ["atomicbitops_test.go"],
+ library = ":atomicbitops",
+ deps = ["//pkg/sync"],
+)
diff --git a/pkg/atomicbitops/atomicbitops.go b/pkg/atomicbitops/atomicbitops.go
new file mode 100644
index 000000000..1be081719
--- /dev/null
+++ b/pkg/atomicbitops/atomicbitops.go
@@ -0,0 +1,47 @@
+// Copyright 2018 The gVisor Authors.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// +build amd64 arm64
+
+// Package atomicbitops provides extensions to the sync/atomic package.
+//
+// All read-modify-write operations implemented by this package have
+// acquire-release memory ordering (like sync/atomic).
+package atomicbitops
+
+// AndUint32 atomically applies bitwise AND operation to *addr with val.
+func AndUint32(addr *uint32, val uint32)
+
+// OrUint32 atomically applies bitwise OR operation to *addr with val.
+func OrUint32(addr *uint32, val uint32)
+
+// XorUint32 atomically applies bitwise XOR operation to *addr with val.
+func XorUint32(addr *uint32, val uint32)
+
+// CompareAndSwapUint32 is like sync/atomic.CompareAndSwapUint32, but returns
+// the value previously stored at addr.
+func CompareAndSwapUint32(addr *uint32, old, new uint32) uint32
+
+// AndUint64 atomically applies bitwise AND operation to *addr with val.
+func AndUint64(addr *uint64, val uint64)
+
+// OrUint64 atomically applies bitwise OR operation to *addr with val.
+func OrUint64(addr *uint64, val uint64)
+
+// XorUint64 atomically applies bitwise XOR operation to *addr with val.
+func XorUint64(addr *uint64, val uint64)
+
+// CompareAndSwapUint64 is like sync/atomic.CompareAndSwapUint64, but returns
+// the value previously stored at addr.
+func CompareAndSwapUint64(addr *uint64, old, new uint64) uint64
diff --git a/pkg/atomicbitops/atomicbitops_amd64.s b/pkg/atomicbitops/atomicbitops_amd64.s
new file mode 100644
index 000000000..54c887ee5
--- /dev/null
+++ b/pkg/atomicbitops/atomicbitops_amd64.s
@@ -0,0 +1,77 @@
+// Copyright 2018 The gVisor Authors.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// +build amd64
+
+#include "textflag.h"
+
+TEXT ·AndUint32(SB),$0-12
+ MOVQ addr+0(FP), BP
+ MOVL val+8(FP), AX
+ LOCK
+ ANDL AX, 0(BP)
+ RET
+
+TEXT ·OrUint32(SB),$0-12
+ MOVQ addr+0(FP), BP
+ MOVL val+8(FP), AX
+ LOCK
+ ORL AX, 0(BP)
+ RET
+
+TEXT ·XorUint32(SB),$0-12
+ MOVQ addr+0(FP), BP
+ MOVL val+8(FP), AX
+ LOCK
+ XORL AX, 0(BP)
+ RET
+
+TEXT ·CompareAndSwapUint32(SB),$0-20
+ MOVQ addr+0(FP), DI
+ MOVL old+8(FP), AX
+ MOVL new+12(FP), DX
+ LOCK
+ CMPXCHGL DX, 0(DI)
+ MOVL AX, ret+16(FP)
+ RET
+
+TEXT ·AndUint64(SB),$0-16
+ MOVQ addr+0(FP), BP
+ MOVQ val+8(FP), AX
+ LOCK
+ ANDQ AX, 0(BP)
+ RET
+
+TEXT ·OrUint64(SB),$0-16
+ MOVQ addr+0(FP), BP
+ MOVQ val+8(FP), AX
+ LOCK
+ ORQ AX, 0(BP)
+ RET
+
+TEXT ·XorUint64(SB),$0-16
+ MOVQ addr+0(FP), BP
+ MOVQ val+8(FP), AX
+ LOCK
+ XORQ AX, 0(BP)
+ RET
+
+TEXT ·CompareAndSwapUint64(SB),$0-32
+ MOVQ addr+0(FP), DI
+ MOVQ old+8(FP), AX
+ MOVQ new+16(FP), DX
+ LOCK
+ CMPXCHGQ DX, 0(DI)
+ MOVQ AX, ret+24(FP)
+ RET
diff --git a/pkg/atomicbitops/atomicbitops_arm64.s b/pkg/atomicbitops/atomicbitops_arm64.s
new file mode 100644
index 000000000..5c780851b
--- /dev/null
+++ b/pkg/atomicbitops/atomicbitops_arm64.s
@@ -0,0 +1,105 @@
+// Copyright 2019 The gVisor Authors.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// +build arm64
+
+#include "textflag.h"
+
+TEXT ·AndUint32(SB),$0-12
+ MOVD ptr+0(FP), R0
+ MOVW val+8(FP), R1
+again:
+ LDAXRW (R0), R2
+ ANDW R1, R2
+ STLXRW R2, (R0), R3
+ CBNZ R3, again
+ RET
+
+TEXT ·OrUint32(SB),$0-12
+ MOVD ptr+0(FP), R0
+ MOVW val+8(FP), R1
+again:
+ LDAXRW (R0), R2
+ ORRW R1, R2
+ STLXRW R2, (R0), R3
+ CBNZ R3, again
+ RET
+
+TEXT ·XorUint32(SB),$0-12
+ MOVD ptr+0(FP), R0
+ MOVW val+8(FP), R1
+again:
+ LDAXRW (R0), R2
+ EORW R1, R2
+ STLXRW R2, (R0), R3
+ CBNZ R3, again
+ RET
+
+TEXT ·CompareAndSwapUint32(SB),$0-20
+ MOVD addr+0(FP), R0
+ MOVW old+8(FP), R1
+ MOVW new+12(FP), R2
+again:
+ LDAXRW (R0), R3
+ CMPW R1, R3
+ BNE done
+ STLXRW R2, (R0), R4
+ CBNZ R4, again
+done:
+ MOVW R3, prev+16(FP)
+ RET
+
+TEXT ·AndUint64(SB),$0-16
+ MOVD ptr+0(FP), R0
+ MOVD val+8(FP), R1
+again:
+ LDAXR (R0), R2
+ AND R1, R2
+ STLXR R2, (R0), R3
+ CBNZ R3, again
+ RET
+
+TEXT ·OrUint64(SB),$0-16
+ MOVD ptr+0(FP), R0
+ MOVD val+8(FP), R1
+again:
+ LDAXR (R0), R2
+ ORR R1, R2
+ STLXR R2, (R0), R3
+ CBNZ R3, again
+ RET
+
+TEXT ·XorUint64(SB),$0-16
+ MOVD ptr+0(FP), R0
+ MOVD val+8(FP), R1
+again:
+ LDAXR (R0), R2
+ EOR R1, R2
+ STLXR R2, (R0), R3
+ CBNZ R3, again
+ RET
+
+TEXT ·CompareAndSwapUint64(SB),$0-32
+ MOVD addr+0(FP), R0
+ MOVD old+8(FP), R1
+ MOVD new+16(FP), R2
+again:
+ LDAXR (R0), R3
+ CMP R1, R3
+ BNE done
+ STLXR R2, (R0), R4
+ CBNZ R4, again
+done:
+ MOVD R3, prev+24(FP)
+ RET
diff --git a/pkg/atomicbitops/atomicbitops_noasm.go b/pkg/atomicbitops/atomicbitops_noasm.go
new file mode 100644
index 000000000..3b2898256
--- /dev/null
+++ b/pkg/atomicbitops/atomicbitops_noasm.go
@@ -0,0 +1,105 @@
+// Copyright 2018 The gVisor Authors.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// +build !amd64,!arm64
+
+package atomicbitops
+
+import (
+ "sync/atomic"
+)
+
+func AndUint32(addr *uint32, val uint32) {
+ for {
+ o := atomic.LoadUint32(addr)
+ n := o & val
+ if atomic.CompareAndSwapUint32(addr, o, n) {
+ break
+ }
+ }
+}
+
+func OrUint32(addr *uint32, val uint32) {
+ for {
+ o := atomic.LoadUint32(addr)
+ n := o | val
+ if atomic.CompareAndSwapUint32(addr, o, n) {
+ break
+ }
+ }
+}
+
+func XorUint32(addr *uint32, val uint32) {
+ for {
+ o := atomic.LoadUint32(addr)
+ n := o ^ val
+ if atomic.CompareAndSwapUint32(addr, o, n) {
+ break
+ }
+ }
+}
+
+func CompareAndSwapUint32(addr *uint32, old, new uint32) (prev uint32) {
+ for {
+ prev = atomic.LoadUint32(addr)
+ if prev != old {
+ return
+ }
+ if atomic.CompareAndSwapUint32(addr, old, new) {
+ return
+ }
+ }
+}
+
+func AndUint64(addr *uint64, val uint64) {
+ for {
+ o := atomic.LoadUint64(addr)
+ n := o & val
+ if atomic.CompareAndSwapUint64(addr, o, n) {
+ break
+ }
+ }
+}
+
+func OrUint64(addr *uint64, val uint64) {
+ for {
+ o := atomic.LoadUint64(addr)
+ n := o | val
+ if atomic.CompareAndSwapUint64(addr, o, n) {
+ break
+ }
+ }
+}
+
+func XorUint64(addr *uint64, val uint64) {
+ for {
+ o := atomic.LoadUint64(addr)
+ n := o ^ val
+ if atomic.CompareAndSwapUint64(addr, o, n) {
+ break
+ }
+ }
+}
+
+func CompareAndSwapUint64(addr *uint64, old, new uint64) (prev uint64) {
+ for {
+ prev = atomic.LoadUint64(addr)
+ if prev != old {
+ return
+ }
+ if atomic.CompareAndSwapUint64(addr, old, new) {
+ return
+ }
+ }
+}
diff --git a/pkg/atomicbitops/atomicbitops_test.go b/pkg/atomicbitops/atomicbitops_test.go
new file mode 100644
index 000000000..73af71bb4
--- /dev/null
+++ b/pkg/atomicbitops/atomicbitops_test.go
@@ -0,0 +1,198 @@
+// Copyright 2018 The gVisor Authors.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+package atomicbitops
+
+import (
+ "runtime"
+ "testing"
+
+ "gvisor.dev/gvisor/pkg/sync"
+)
+
+const iterations = 100
+
+func detectRaces32(val, target uint32, fn func(*uint32, uint32)) bool {
+ runtime.GOMAXPROCS(100)
+ for n := 0; n < iterations; n++ {
+ x := val
+ var wg sync.WaitGroup
+ for i := uint32(0); i < 32; i++ {
+ wg.Add(1)
+ go func(a *uint32, i uint32) {
+ defer wg.Done()
+ fn(a, uint32(1<<i))
+ }(&x, i)
+ }
+ wg.Wait()
+ if x != target {
+ return true
+ }
+ }
+ return false
+}
+
+func detectRaces64(val, target uint64, fn func(*uint64, uint64)) bool {
+ runtime.GOMAXPROCS(100)
+ for n := 0; n < iterations; n++ {
+ x := val
+ var wg sync.WaitGroup
+ for i := uint64(0); i < 64; i++ {
+ wg.Add(1)
+ go func(a *uint64, i uint64) {
+ defer wg.Done()
+ fn(a, uint64(1<<i))
+ }(&x, i)
+ }
+ wg.Wait()
+ if x != target {
+ return true
+ }
+ }
+ return false
+}
+
+func TestOrUint32(t *testing.T) {
+ if detectRaces32(0x0, 0xffffffff, OrUint32) {
+ t.Error("Data race detected!")
+ }
+}
+
+func TestAndUint32(t *testing.T) {
+ if detectRaces32(0xf0f0f0f0, 0x00000000, AndUint32) {
+ t.Error("Data race detected!")
+ }
+}
+
+func TestXorUint32(t *testing.T) {
+ if detectRaces32(0xf0f0f0f0, 0x0f0f0f0f, XorUint32) {
+ t.Error("Data race detected!")
+ }
+}
+
+func TestOrUint64(t *testing.T) {
+ if detectRaces64(0x0, 0xffffffffffffffff, OrUint64) {
+ t.Error("Data race detected!")
+ }
+}
+
+func TestAndUint64(t *testing.T) {
+ if detectRaces64(0xf0f0f0f0f0f0f0f0, 0x0, AndUint64) {
+ t.Error("Data race detected!")
+ }
+}
+
+func TestXorUint64(t *testing.T) {
+ if detectRaces64(0xf0f0f0f0f0f0f0f0, 0x0f0f0f0f0f0f0f0f, XorUint64) {
+ t.Error("Data race detected!")
+ }
+}
+
+func TestCompareAndSwapUint32(t *testing.T) {
+ tests := []struct {
+ name string
+ prev uint32
+ old uint32
+ new uint32
+ next uint32
+ }{
+ {
+ name: "Successful compare-and-swap with prev == new",
+ prev: 10,
+ old: 10,
+ new: 10,
+ next: 10,
+ },
+ {
+ name: "Successful compare-and-swap with prev != new",
+ prev: 20,
+ old: 20,
+ new: 22,
+ next: 22,
+ },
+ {
+ name: "Failed compare-and-swap with prev == new",
+ prev: 31,
+ old: 30,
+ new: 31,
+ next: 31,
+ },
+ {
+ name: "Failed compare-and-swap with prev != new",
+ prev: 41,
+ old: 40,
+ new: 42,
+ next: 41,
+ },
+ }
+ for _, test := range tests {
+ val := test.prev
+ prev := CompareAndSwapUint32(&val, test.old, test.new)
+ if got, want := prev, test.prev; got != want {
+ t.Errorf("%s: incorrect returned previous value: got %d, expected %d", test.name, got, want)
+ }
+ if got, want := val, test.next; got != want {
+ t.Errorf("%s: incorrect value stored in val: got %d, expected %d", test.name, got, want)
+ }
+ }
+}
+
+func TestCompareAndSwapUint64(t *testing.T) {
+ tests := []struct {
+ name string
+ prev uint64
+ old uint64
+ new uint64
+ next uint64
+ }{
+ {
+ name: "Successful compare-and-swap with prev == new",
+ prev: 0x100000000,
+ old: 0x100000000,
+ new: 0x100000000,
+ next: 0x100000000,
+ },
+ {
+ name: "Successful compare-and-swap with prev != new",
+ prev: 0x200000000,
+ old: 0x200000000,
+ new: 0x200000002,
+ next: 0x200000002,
+ },
+ {
+ name: "Failed compare-and-swap with prev == new",
+ prev: 0x300000001,
+ old: 0x300000000,
+ new: 0x300000001,
+ next: 0x300000001,
+ },
+ {
+ name: "Failed compare-and-swap with prev != new",
+ prev: 0x400000001,
+ old: 0x400000000,
+ new: 0x400000002,
+ next: 0x400000001,
+ },
+ }
+ for _, test := range tests {
+ val := test.prev
+ prev := CompareAndSwapUint64(&val, test.old, test.new)
+ if got, want := prev, test.prev; got != want {
+ t.Errorf("%s: incorrect returned previous value: got %d, expected %d", test.name, got, want)
+ }
+ if got, want := val, test.next; got != want {
+ t.Errorf("%s: incorrect value stored in val: got %d, expected %d", test.name, got, want)
+ }
+ }
+}
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-04 09:41:07 +0000