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| author | Michael Pratt <mpratt@google.com> | 2019-02-19 16:31:18 -0800 |
|---|---|---|
| committer | Shentubot <shentubot@google.com> | 2019-02-19 16:32:22 -0800 |
| commit | 0b310ada5b7f79bc629bb98aab14faeeec1af25b (patch) | |
| tree | 1b8e32f6229305d2a38081c207653d5883d4c6ee /test | |
| parent | 2840f7c1b12c88f47f7c3c8df659ca436f5901b6 (diff) | |
Rename "perfctr_l2" to "perfctr_llc"
910448bbed066ab1082b510eef1ae61bb792d854 ("perf/x86/amd/uncore: Rename
cpufeatures macro for cache counters") in 4.14 changed the name.
We change both the internal and cpuinfo name. As the upstream commit
states, "In Family 17h, L3 is the last level cache as opposed to L2 in
previous families. Avoid this name confusion ..."
PiperOrigin-RevId: 234698034
Change-Id: Ibf2efd4c0b83c1a8b5bb123da65ea1d7c6acd778
Diffstat (limited to 'test')
0 files changed, 0 insertions, 0 deletions