diff options
author | Bin Lu <bin.lu@arm.com> | 2020-07-10 03:21:50 -0400 |
---|---|---|
committer | Bin Lu <bin.lu@arm.com> | 2020-07-26 22:25:27 -0400 |
commit | ced5863c4938ab2219331dc88bb3a301c1815918 (patch) | |
tree | 8dbb2475ddf0b4b936f80a93494d53df68899433 /pkg/sentry | |
parent | d6b676ae6ac6ab6f3520d6d2663b9d71c29a3788 (diff) |
allow guest user applications read CNTVCT_EL0/CNTFRQ_EL0
At present, when doing syscall_kvm test, we need to
enable the function of ESR_ELx_SYS64_ISS_SYS_CNTVCT/ESR_ELx_SYS64_ISS_SYS_CNTFRQ to
successfully pass the test.
I set CNTKCTL_EL1.EL0VCTEN==1/CNTKCTL_EL1.EL0PCTEN==1, so that the related cases can passed.
Signed-off-by: Bin Lu <bin.lu@arm.com>
Diffstat (limited to 'pkg/sentry')
-rw-r--r-- | pkg/sentry/platform/ring0/entry_arm64.s | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/pkg/sentry/platform/ring0/entry_arm64.s b/pkg/sentry/platform/ring0/entry_arm64.s index 6ed73699b..9fd02d628 100644 --- a/pkg/sentry/platform/ring0/entry_arm64.s +++ b/pkg/sentry/platform/ring0/entry_arm64.s @@ -48,6 +48,12 @@ #define SCTLR_EL1_DEFAULT (SCTLR_M | SCTLR_C | SCTLR_I | SCTLR_UCT) +// cntkctl_el1: counter-timer kernel control register el1. +#define CNTKCTL_EL0PCTEN 1 << 0 +#define CNTKCTL_EL0VCTEN 1 << 1 + +#define CNTKCTL_EL1_DEFAULT (CNTKCTL_EL0PCTEN | CNTKCTL_EL0VCTEN) + // Saves a register set. // // This is a macro because it may need to executed in contents where a stack is @@ -509,6 +515,9 @@ TEXT ·Start(SB),NOSPLIT,$0 MOVD $SCTLR_EL1_DEFAULT, R1 MSR R1, SCTLR_EL1 + MOVD $CNTKCTL_EL1_DEFAULT, R1 + MSR R1, CNTKCTL_EL1 + MOVD R8, RSV_REG ORR $0xffff000000000000, RSV_REG, RSV_REG WORD $0xd518d092 //MSR R18, TPIDR_EL1 |