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| author | gVisor bot <gvisor-bot@google.com> | 2021-09-20 12:24:48 -0700 |
|---|---|---|
| committer | gVisor bot <gvisor-bot@google.com> | 2021-09-20 12:28:06 -0700 |
| commit | 206d7bb90cfbd017fbb26db805aa2fcf6cdffa4f (patch) | |
| tree | aead3a9e5a1118ea852a0568e6cdbb63cd758972 /pkg/sentry | |
| parent | 5951ec5bce17e7696d2fd53ce384839555dd3c79 (diff) | |
Internal change.
PiperOrigin-RevId: 397813331
Diffstat (limited to 'pkg/sentry')
| -rw-r--r-- | pkg/sentry/time/sampler_arm64.go | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/pkg/sentry/time/sampler_arm64.go b/pkg/sentry/time/sampler_arm64.go index 3560e66ae..9b8c9a480 100644 --- a/pkg/sentry/time/sampler_arm64.go +++ b/pkg/sentry/time/sampler_arm64.go @@ -30,9 +30,9 @@ func getDefaultArchOverheadCycles() TSCValue { // frqRatio. defaultOverheadCycles of ARM equals to that on // x86 devided by frqRatio cntfrq := getCNTFRQ() - frqRatio := 1000000000 / cntfrq + frqRatio := 1000000000 / float64(cntfrq) overheadCycles := (1 * 1000) / frqRatio - return overheadCycles + return TSCValue(overheadCycles) } // defaultOverheadTSC is the default estimated syscall overhead in TSC cycles. |