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author | howard zhang <howard.zhang@arm.com> | 2021-05-14 11:00:36 +0800 |
---|---|---|
committer | Howard Zhang <howard.zhang@arm.com> | 2021-05-14 16:40:36 +0800 |
commit | be0897702e77081ce6f1add7b4e98fcfcc020d7e (patch) | |
tree | c74fe81c83ab6a1a8bad46a8d8bd6b64bee49113 /pkg/sentry/time/tsc_arm64.s | |
parent | 2b457d9ee9ba50da4a9208d957053fac2c77932d (diff) |
calibrate defaultOverheadCycles for ARM64
Usually ARM counter-timer frequency is range from 1-50Mhz which is
much less than that on x86, so we calibrate defaultOverheadCycles
for ARM.
Signed-off-by: howard zhang <howard.zhang@arm.com>
Diffstat (limited to 'pkg/sentry/time/tsc_arm64.s')
-rw-r--r-- | pkg/sentry/time/tsc_arm64.s | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/pkg/sentry/time/tsc_arm64.s b/pkg/sentry/time/tsc_arm64.s index da9fa4112..711349fa1 100644 --- a/pkg/sentry/time/tsc_arm64.s +++ b/pkg/sentry/time/tsc_arm64.s @@ -20,3 +20,9 @@ TEXT ·Rdtsc(SB),NOSPLIT,$0-8 WORD $0xd53be040 //MRS CNTVCT_EL0, R0 MOVD R0, ret+0(FP) RET + +TEXT ·getCNTFRQ(SB),NOSPLIT,$0-8 + // Get the virtual counter frequency. + WORD $0xd53be000 //MRS CNTFRQ_EL0, R0 + MOVD R0, ret+0(FP) + RET |