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authorhoward zhang <howard.zhang@arm.com>2021-05-14 11:00:36 +0800
committerHoward Zhang <howard.zhang@arm.com>2021-05-14 16:40:36 +0800
commitbe0897702e77081ce6f1add7b4e98fcfcc020d7e (patch)
treec74fe81c83ab6a1a8bad46a8d8bd6b64bee49113 /pkg/sentry/time/sampler_arm64.go
parent2b457d9ee9ba50da4a9208d957053fac2c77932d (diff)
calibrate defaultOverheadCycles for ARM64
Usually ARM counter-timer frequency is range from 1-50Mhz which is much less than that on x86, so we calibrate defaultOverheadCycles for ARM. Signed-off-by: howard zhang <howard.zhang@arm.com>
Diffstat (limited to 'pkg/sentry/time/sampler_arm64.go')
-rw-r--r--pkg/sentry/time/sampler_arm64.go42
1 files changed, 42 insertions, 0 deletions
diff --git a/pkg/sentry/time/sampler_arm64.go b/pkg/sentry/time/sampler_arm64.go
new file mode 100644
index 000000000..b9d0273b7
--- /dev/null
+++ b/pkg/sentry/time/sampler_arm64.go
@@ -0,0 +1,42 @@
+// Copyright 2018 The gVisor Authors.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+//+build arm64
+
+package time
+
+// getCNTFRQ get ARM counter-timer frequency
+func getCNTFRQ() TSCValue
+
+// getDefaultArchOverheadCycles get default OverheadCycles based on
+// ARM counter-timer frequency. Usually ARM counter-timer frequency
+// is range from 1-50Mhz which is much less than that on x86, so we
+// calibrate defaultOverheadCycles for ARM.
+func getDefaultArchOverheadCycles() TSCValue {
+ // estimated the clock frequency on x86 is 1Ghz.
+ // 1Ghz devided by counter-timer frequency of ARM to get
+ // frqRatio. defaultOverheadCycles of ARM equals to that on
+ // x86 devided by frqRatio
+ cntfrq := getCNTFRQ()
+ frqRatio := 1000000000 / cntfrq
+ overheadCycles := ( 1 * 1000 ) / frqRatio
+ return overheadCycles
+}
+
+// defaultOverheadTSC is the default estimated syscall overhead in TSC cycles.
+// It is further refined as syscalls are made.
+var defaultOverheadCycles = getDefaultArchOverheadCycles()
+
+// maxOverheadCycles is the maximum allowed syscall overhead in TSC cycles.
+var maxOverheadCycles = 100 * defaultOverheadCycles