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authorhoward zhang <howard.zhang@arm.com>2021-05-14 11:00:36 +0800
committerHoward Zhang <howard.zhang@arm.com>2021-05-14 16:40:36 +0800
commitbe0897702e77081ce6f1add7b4e98fcfcc020d7e (patch)
treec74fe81c83ab6a1a8bad46a8d8bd6b64bee49113 /pkg/sentry/time/sampler.go
parent2b457d9ee9ba50da4a9208d957053fac2c77932d (diff)
calibrate defaultOverheadCycles for ARM64
Usually ARM counter-timer frequency is range from 1-50Mhz which is much less than that on x86, so we calibrate defaultOverheadCycles for ARM. Signed-off-by: howard zhang <howard.zhang@arm.com>
Diffstat (limited to 'pkg/sentry/time/sampler.go')
-rw-r--r--pkg/sentry/time/sampler.go7
1 files changed, 0 insertions, 7 deletions
diff --git a/pkg/sentry/time/sampler.go b/pkg/sentry/time/sampler.go
index 4ac9c4474..24a47f5d5 100644
--- a/pkg/sentry/time/sampler.go
+++ b/pkg/sentry/time/sampler.go
@@ -21,13 +21,6 @@ import (
)
const (
- // defaultOverheadTSC is the default estimated syscall overhead in TSC cycles.
- // It is further refined as syscalls are made.
- defaultOverheadCycles = 1 * 1000
-
- // maxOverheadCycles is the maximum allowed syscall overhead in TSC cycles.
- maxOverheadCycles = 100 * defaultOverheadCycles
-
// maxSampleLoops is the maximum number of times to try to get a clock sample
// under the expected overhead.
maxSampleLoops = 5