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author | Robin Luk <lubin.lu@antgroup.com> | 2021-03-26 16:04:28 +0800 |
---|---|---|
committer | Robin Luk <lubin.lu@antgroup.com> | 2021-03-26 16:10:21 +0800 |
commit | 72cd22163f9c7fdfafa645b3b6826b185bbbdf76 (patch) | |
tree | cec53fc59bfbab898a9686988cb0a7568e27bf48 /pkg/ring0/lib_arm64.go | |
parent | fbec65fc3f21773cbec3db4aadf27b85e8859448 (diff) |
arm64 ring0: don't use inner-sharable to invalidate tlb
It is enough to invalidate the tlb of local vcpu in switch().
TLBI with inner-sharable will invalidate the tlb in other vcpu.
Arm64 hardware supports at least 256 pcid, so I think it's ok
to set the length of pcid pool to 128.
Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
Diffstat (limited to 'pkg/ring0/lib_arm64.go')
-rw-r--r-- | pkg/ring0/lib_arm64.go | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/pkg/ring0/lib_arm64.go b/pkg/ring0/lib_arm64.go index edf24eda3..f1c323bac 100644 --- a/pkg/ring0/lib_arm64.go +++ b/pkg/ring0/lib_arm64.go @@ -31,6 +31,9 @@ func FlushTlbByVA(addr uintptr) // FlushTlbByASID invalidates tlb by ASID/Inner-Shareable. func FlushTlbByASID(asid uintptr) +// LocalFlushTlbByASID invalidates tlb by ASID. +func LocalFlushTlbByASID(asid uintptr) + // FlushTlbAll invalidates all tlb. func FlushTlbAll() |