diff options
author | gVisor bot <gvisor-bot@google.com> | 2020-02-18 13:42:31 -0800 |
---|---|---|
committer | gVisor bot <gvisor-bot@google.com> | 2020-02-18 13:43:28 -0800 |
commit | 906eb6295d54a05663a223f1dc379a16148de2d1 (patch) | |
tree | 8a6848a35411383479e39800186f38a5a21cf450 /pkg/atomicbitops/atomicbitops_amd64.s | |
parent | c841373013ec8659b2954563796479f275b00bfa (diff) |
atomicbitops package cleanups
- Redocument memory ordering from "no ordering" to "acquire-release". (No
functional change: both LOCK WHATEVER on x86, and LDAXR/STLXR loops on ARM64,
already have this property.)
- Remove IncUnlessZeroInt32 and DecUnlessOneInt32, which were only faster than
the equivalent loops using sync/atomic before the Go compiler inlined
non-unsafe.Pointer atomics many releases ago.
PiperOrigin-RevId: 295811743
Diffstat (limited to 'pkg/atomicbitops/atomicbitops_amd64.s')
-rw-r--r-- | pkg/atomicbitops/atomicbitops_amd64.s | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/pkg/atomicbitops/atomicbitops_amd64.s b/pkg/atomicbitops/atomicbitops_amd64.s new file mode 100644 index 000000000..54c887ee5 --- /dev/null +++ b/pkg/atomicbitops/atomicbitops_amd64.s @@ -0,0 +1,77 @@ +// Copyright 2018 The gVisor Authors. +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +// +build amd64 + +#include "textflag.h" + +TEXT ·AndUint32(SB),$0-12 + MOVQ addr+0(FP), BP + MOVL val+8(FP), AX + LOCK + ANDL AX, 0(BP) + RET + +TEXT ·OrUint32(SB),$0-12 + MOVQ addr+0(FP), BP + MOVL val+8(FP), AX + LOCK + ORL AX, 0(BP) + RET + +TEXT ·XorUint32(SB),$0-12 + MOVQ addr+0(FP), BP + MOVL val+8(FP), AX + LOCK + XORL AX, 0(BP) + RET + +TEXT ·CompareAndSwapUint32(SB),$0-20 + MOVQ addr+0(FP), DI + MOVL old+8(FP), AX + MOVL new+12(FP), DX + LOCK + CMPXCHGL DX, 0(DI) + MOVL AX, ret+16(FP) + RET + +TEXT ·AndUint64(SB),$0-16 + MOVQ addr+0(FP), BP + MOVQ val+8(FP), AX + LOCK + ANDQ AX, 0(BP) + RET + +TEXT ·OrUint64(SB),$0-16 + MOVQ addr+0(FP), BP + MOVQ val+8(FP), AX + LOCK + ORQ AX, 0(BP) + RET + +TEXT ·XorUint64(SB),$0-16 + MOVQ addr+0(FP), BP + MOVQ val+8(FP), AX + LOCK + XORQ AX, 0(BP) + RET + +TEXT ·CompareAndSwapUint64(SB),$0-32 + MOVQ addr+0(FP), DI + MOVQ old+8(FP), AX + MOVQ new+16(FP), DX + LOCK + CMPXCHGQ DX, 0(DI) + MOVQ AX, ret+24(FP) + RET |