diff options
| author | Koichi Shiraishi <zchee.io@gmail.com> | 2021-06-14 11:09:14 +0900 |
|---|---|---|
| committer | Koichi Shiraishi <zchee.io@gmail.com> | 2021-06-14 11:09:14 +0900 |
| commit | d00ef10456cd0fcf142864d6bfc5d8f8bc88e684 (patch) | |
| tree | b90cc23958f379145a8c0dee56bbe52544fb0af3 /pkg/atomicbitops/atomicbitops_amd64.s | |
| parent | b92e8ee8d6744d81383f4265faa008ccce894f5e (diff) | |
Fix frame pointer is clobbered before saving vet issue on BP register
BP should be callee-save. It will be saved automatically if there is nonzero frame size.
$ go vet -framepointer ./pkg/atomicbitops
pkg/atomicbitops/atomicbitops_amd64.s:27:1: frame pointer is clobbered before saving
pkg/atomicbitops/atomicbitops_amd64.s:34:1: frame pointer is clobbered before saving
pkg/atomicbitops/atomicbitops_amd64.s:50:1: frame pointer is clobbered before saving
pkg/atomicbitops/atomicbitops_amd64.s:57:1: frame pointer is clobbered before saving
pkg/atomicbitops/atomicbitops_amd64.s:64:1: frame pointer is clobbered before saving
Signed-off-by: Koichi Shiraishi <zchee.io@gmail.com>
Diffstat (limited to 'pkg/atomicbitops/atomicbitops_amd64.s')
| -rw-r--r-- | pkg/atomicbitops/atomicbitops_amd64.s | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/pkg/atomicbitops/atomicbitops_amd64.s b/pkg/atomicbitops/atomicbitops_amd64.s index 54c887ee5..4d9358a3b 100644 --- a/pkg/atomicbitops/atomicbitops_amd64.s +++ b/pkg/atomicbitops/atomicbitops_amd64.s @@ -16,21 +16,21 @@ #include "textflag.h" -TEXT ·AndUint32(SB),$0-12 +TEXT ·AndUint32(SB),$8-12 MOVQ addr+0(FP), BP MOVL val+8(FP), AX LOCK ANDL AX, 0(BP) RET -TEXT ·OrUint32(SB),$0-12 +TEXT ·OrUint32(SB),$8-12 MOVQ addr+0(FP), BP MOVL val+8(FP), AX LOCK ORL AX, 0(BP) RET -TEXT ·XorUint32(SB),$0-12 +TEXT ·XorUint32(SB),$8-12 MOVQ addr+0(FP), BP MOVL val+8(FP), AX LOCK @@ -46,21 +46,21 @@ TEXT ·CompareAndSwapUint32(SB),$0-20 MOVL AX, ret+16(FP) RET -TEXT ·AndUint64(SB),$0-16 +TEXT ·AndUint64(SB),$8-16 MOVQ addr+0(FP), BP MOVQ val+8(FP), AX LOCK ANDQ AX, 0(BP) RET -TEXT ·OrUint64(SB),$0-16 +TEXT ·OrUint64(SB),$8-16 MOVQ addr+0(FP), BP MOVQ val+8(FP), AX LOCK ORQ AX, 0(BP) RET -TEXT ·XorUint64(SB),$0-16 +TEXT ·XorUint64(SB),$8-16 MOVQ addr+0(FP), BP MOVQ val+8(FP), AX LOCK |