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| author | gVisor bot <gvisor-bot@google.com> | 2020-10-05 17:11:42 -0700 |
|---|---|---|
| committer | gVisor bot <gvisor-bot@google.com> | 2020-10-05 17:11:42 -0700 |
| commit | 8ef7cebcbb6b7a1fa4a8725421cd04f1c73398b1 (patch) | |
| tree | c343d573d53eb3ca3543f8a5a88075d1b5c971c0 | |
| parent | 1bc78d9fda68d7141ea63cd0c26dd0119ea49cf4 (diff) | |
| parent | 2c849c72b9414597f00e5ec4239238d9751148d8 (diff) | |
Merge pull request #4079 from lemin9538:arm64_fix
PiperOrigin-RevId: 335532690
| -rw-r--r-- | pkg/sentry/platform/ring0/entry_arm64.s | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/pkg/sentry/platform/ring0/entry_arm64.s b/pkg/sentry/platform/ring0/entry_arm64.s index 5f63cbd45..f3d934996 100644 --- a/pkg/sentry/platform/ring0/entry_arm64.s +++ b/pkg/sentry/platform/ring0/entry_arm64.s @@ -461,6 +461,14 @@ TEXT ·kernelExitToEl0(SB),NOSPLIT,$0 MOVD PTRACE_PSTATE(RSV_REG_APP), R1 WORD $0xd5184001 //MSR R1, SPSR_EL1 + // need use kernel space address to excute below code, since + // after SWITCH_TO_APP_PAGETABLE the ASID is changed to app's + // ASID. + WORD $0x10000061 // ADR R1, do_exit_to_el0 + ORR $0xffff000000000000, R1, R1 + JMP (R1) + +do_exit_to_el0: // RSV_REG & RSV_REG_APP will be loaded at the end. REGISTERS_LOAD(RSV_REG_APP, 0) |