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| author | Min Le <lemin.lm@antgroup.com> | 2020-10-15 13:48:06 +0800 |
|---|---|---|
| committer | Min Le <lemin.lm@antgroup.com> | 2020-10-15 13:48:06 +0800 |
| commit | 4f077b9a7ef0cbf5ae6b65d02720d0cb0a5111c9 (patch) | |
| tree | 299f6aa109cd8e0f1033140d1b54837f1202ab12 | |
| parent | 6e6a9d3f3dd6dd9ce290952406ba7ca7c5570311 (diff) | |
arm64: the ASID offset of TTBR register is 48
Signed-off-by: Min Le <lemin.lm@antgroup.com>
| -rw-r--r-- | pkg/sentry/platform/ring0/pagetables/pagetables_arm64.go | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/pkg/sentry/platform/ring0/pagetables/pagetables_arm64.go b/pkg/sentry/platform/ring0/pagetables/pagetables_arm64.go index 1a49f12a2..5ddd10256 100644 --- a/pkg/sentry/platform/ring0/pagetables/pagetables_arm64.go +++ b/pkg/sentry/platform/ring0/pagetables/pagetables_arm64.go @@ -36,7 +36,7 @@ const ( pudSize = 1 << pudShift pgdSize = 1 << pgdShift - ttbrASIDOffset = 55 + ttbrASIDOffset = 48 ttbrASIDMask = 0xff entriesPerPage = 512 |